SimVision Debug

SimVision Debug can be used to debug digital, analog, or mixed-signal designs written in Verilog, SystemVerilog, e, VHDL, and SystemClanguages or a combination thereof. SimVision integrated debug supports signal-level and transaction-based flows across all IEEE-standard design, testbench, and assertion languages, in addition to concurrent visualization of hardware, software, and analog domains. SimVision Debug provides a unified simulation and debug environment that allows Incisive Enterprise Simulator to manage multiple simulation runs easily and to analyze both design and testbench behavior at any point in the verification processregardless of the composition.

Languages supported:

8.8/10 (Expert Score) ★★★★★
Product is rated as #47 in category Bug Tracking Software
Ease of use
8.5
Support
8.9
Ease of Setup
8.7

SimVision Debug can be used to debug digital, analog, or mixed-signal designs written in Verilog, SystemVerilog, e, VHDL, and SystemClanguages or a combination thereof. SimVision integrated debug supports signal-level and transaction-based flows across all IEEE-standard design, testbench, and assertion languages, in addition to concurrent visualization of hardware, software, and analog domains. SimVision Debug provides a unified simulation and debug environment that allows Incisive Enterprise Simulator to manage multiple simulation runs easily and to analyze both design and testbench behavior at any point in the verification processregardless of the composition.

SimVision Debug
SimVision Debug

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Customer Reviews

SimVision Debug Reviews

Jatin B.

Advanced user of SimVision Debug
★★★★★
Very User Friendly Tool having Multiple Features

What do you like best?

The best thing about using it is that it has multiple options available that makes it different from other debugging tools. I have been using it after using VCS and this one seems more user friendly. It has many option like Trace Drivers Sidebars that shows us the information of the percentage of that logic participating in the mismatch and that cool. Debugging has been at very ease with its features of representing the testbench string in ASCII format and other various format which as a fresher becomes very much useful to know in which mode you are and you are facing the issue that gives kickstart to the debug. The filter options available to search the hierarchy are very good. We can match any string with the hierarchy if it is a dot or slash though these are small small things but I find them very user friendly. It saves the previous 2-3 sessions in tool memory and gives us an option to reopen session again if it hangs while debugging issue.

What do you dislike?

The only one thing I dislike the most is it's schematic tracer. Someone would feel it good as it gives the whole hierarchical schematic in the schematic browser but some times it happens that the it shows the nets unconnected which we find as connected if we analyze in the Netlist or DFTVisualizer.

What problems are you solving with the product? What benefits have you realized?

Currently, I am looking at pattern mismatches that we face while simulating the test patterns generated from the ATPG tool. Also, I use it to dump VCD's to provide it to Physical Design Team where they perform IR DROP analysis for the same.

Debugging becomes very easy by using the filters available while loading the signals.

Simvision supports each and every present in the test bench like procedure_strings, pattern_count, pattern_number, cycle_count etc. that provides a good start to the debug.

While debugging I find it very cool that though there are 1000 patterns present in the .v file testcase but we can simple run 1-10 or 20-30 or any chunk of pattern by giving START_PATTERN and END_PATTERN in it. This means I do not need to regenerate patterns again in ATPG environment. I can simply run them from my Simulation environment.

Review source: G2.com

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